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ds07-12538-1e fujitsu semiconductor data sheet 8-bit proprietary microcontroller cmos f 2 mc-8l mb89990 series mb89997 n outline the mb89990 series microcontrollers contain various resources such as timers, external interrupts, and remote- control functions, as well as an f 2 mc*-8l cpu core for low-voltage and high-speed operations. these single- chip microcontrollers are suitable for small devices such as remote controllers incorporating compact packages. *: f 2 mc stands for fujitsu flexible microcontroller. n features ? minimum execution time: 0.95 m s at 4.2 mhz (v cc = 2.7 v) ?f 2 mc-8l family cpu core ?two timers 8/16-bit timer/counter 20-bit timebase counter (continued) n pac k ag e 28-pin plastic sop (fpt-28p-m17) 28-pin plastic sh-dip (dip-28p-m03) 48-pin ceramic mqfp (mqp-48c-p01)
2 mb89990 series (continued) ? external interrupts edge detection (edge selection enabled): 3 channels low-level interrupt (wake-up function): 8 channels ? internal remote-control transmission frequency generator ? low-power consumption modes stop mode (almost no current consumption occurs because oscillation stops.) sleep mode (the current consumption is about 1/3 of that during normal operation because the cpu stops.) ?packages sop-28 and sh-dip-28 n product lineup (continued) mb89997 mb89p195* 1 mb89pv190* 2 classification mass-produced products (mask rom products) one-time prom product for development and evaluation rom size 32 k 8 bits (internal mask rom) 16 k 8 bits (internal prom, to be programmed with general- purpose eprom programmer) 32 k 8 bits (external rom) ram size 128 8 bits 256 8 bits cpu functions the number of basic instructions: 136 instruction bit length: 8 bits instruction length: 1 to 3 bytes data bit length: 1, 8, and 16 bits minimum execution time: 0.95 m s at 4.2 mhz interrupt processing time: 8.57 m s at 4.2 mhz ports i/o port (n channel open drain): 6 i/o port (cmos): 16 (13 serves as resources) total: 22 8/16-bit timer/ counter 2 channels for 8-bit timer counter or for 16-bit event counter (operation clock: 1.9 m s, 30.4 m s, and 487.6 m s at 4.2 mhz, and external clock) external interrupt 1 3 independent channels (edge selection, interrupt vector, and interrupt source flag) rising edge/falling edge/both edge selectability used for wake-up from stop/sleep mode. (edge detection is also permitted in stop mode.) external interrupt 2 (wake-up function) 8 channels (low-level interrupt only) remote-control transmission frequency generation the pulse width and cycle are software-programmable. part number item
3 mb89990 series (continued) *1 : the mb89p195 microtroller is the one-time product for the mb89190 series which can be also be used for the mb89990 series. *2 : the mb89pv190 microtroller is the evaluation and development product for the mb89190 series which can be also be used for the mb89990 series. *3 : varies with conditions such as operating frequencies (see n electrical characteristics.) n package and corresponding products : available : not available * : a socket (manufacturer: sun hayato co., ltd.) for pin pitch conversion is available. 480f-28sop-8l: (mqp-48c-p01) ? for conversion to fpt-28p-m02 inquiry: sun hayato co., ltd.: tel: (81)-3-3986-0403 fax: (81)-3-5396-9106 note: for more information on each package, see n package dimensions. mb89997 mb89p195* 1 mb89pv190* 2 low-power consumption (standby mode) sleep mode and stop mode process cmos power supply voltage* 3 2.2 v to 6.0 v 2.7 v to 6.0 v eprom for use mbm27c256a-20tvm package mb89997 mb89p195 mb89pv190 dip-28p-m03 fpt-28p-m17 mqp-48c-p01 * part number item
4 mb89990 series n differences among products 1. memory size before evaluating using the piggyback model, verify its difference from the model that will actually be used. take particular care on the following points: ? on the mb89997, addresses 0140 h to 0180 h cannot be used for register banks. ? the stack area, etc., is set in the upper limit of the ram. 2. current consumption ? in the case of mb89pv190, add the current consumed by the eprom which is connected to the top socket. ? when operated at low speed, a model with an otprom (eprom) will consume more current than a model with a mask rom. however, current consumption in the sleep/stop mode in the same. (for more information, see n electrical characteristics.) 3. mask options functions that can be selected as options and how to designate these options vary by model. before using options check n mask options. take particular care on the following points: ? the power-on reset option is fixed as enabled for mb89p195. ? options are fixed on the mb89pv190.
5 mb89990 series n pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 p04/int24 p05/int25 p06/int26 p07/int27 test rst x0 x1 v ss p37/rco p36/int12 p35/int11 p34/to/int10 p33/ec v cc p03/int23 p02/int22 p01/int21 p00/int20 p45 p44 p43 p42 p41 p40 p30 p31 p32 (top view) (fpt-28p-m17) (dip-28p-m03)
6 mb89990 series pin assignment on the package top (mb89pv190/pv190a only) n.c.: internally connected. do not use. note: parenthesized pin function is only for the mb89pv190a. pin no. pin name pin no. pin name pin no. pin name pin no. pin name 49 v pp 57 n.c. 65 o4 73 oe 50a1258a266o574n.c. 51 a7 59 a1 67 o6 75 a11 52 a6 60 a0 68 o7 76 a9 53 a5 61 o1 69 o8 77 a8 54 a4 62 o2 70 ce 78 a13 55 a3 63 o3 71 a10 79 a14 56 n.c. 64 v ss 72 n.c. 80 v cc p34/to/int10 p33/ec p32/(si) p31/(so) p30/(sck) p40/(an0) p41/(an1) p42/(an2) p43/(an3) p44/(av ss ) p45/(avr) p00/int20/(an4) n. c. n. c. p36/int12 p37/(bz)/rco x1 x0 rst test p07/int27 p06/int26 p05/int25 p04/int24 p01/int21/(an5) n. c. n. c. n. c. n. c. v cc n. c. n. c. n. c. n. c. p02/int22/(an6) p03/int23/(an7) p35/int11 n. c. n. c. n. c. n. c. n. c. v ss n. c. n. c. n. c. n. c. n. c. 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 68 67 66 65 64 63 62 61 77 78 79 80 49 50 51 52 69 70 71 72 73 74 75 76 60 59 58 57 56 55 54 53 (top view) (mqp-48c-p01) each pin inside the dashed line is for mb89pv190/pv190a units only.
7 mb89990 series n pin description (continued) *1: fpt-28p-m17 *2: dip-28p-m03 *3: mqp-48c-p01 pin no. pin name circuit type function sop* 1 , sh-dip* 2 mqfp* 3 7 31 x0 a clock oscillation pins 832x1 5 29 test b test input pin this pin is connected directly to v ss . 630rst c reset i/o pin this pin consists of an n-ch open-drain output with a pull-up resistor and hysteresis input. a low level is output from this pin by internal source. the internal circuit is initialized at the input of a low level. 24, 25, 26, 27 12, 13, 23, 24 p00/int20 , p01/int21 , p02/int22 , p03/int23 g general-purpose i/o ports also serve as external interrupt input pins. external interrupt input is hysteresis input type. 1 to 4 25 to 28 p04/int24 to p07/int27 d general-purpose i/o ports also serve as external interrupt input. external interrupt input is hysteresis input type. 17 5 p30 d general-purpose i/o port also serves as a serial i/o clock i/o. the serial i/o clock input is hysteresis input type with a built-in noise filter. 16 4 p31 e general-purpose i/o port also serves as a serial i/o data output pin. 15 3 p32 d general-purpose i/o port also serves as a serial i/o data input pin. the serial i/o data input is hysteresis input type with a built-in noise filter. 14 2 p33/ec d general-purpose i/o port also serves as an external clock input pin for the 8- bit timer/counter. external clock input of the 8-bit timer/counter is hysteresis input type with a built-in noise filter. 13 1 p34/to/int10 d general-purpose i/o port also serves as the overflow output and external interrupt input for the 8-bit timer/counter. external interrupt input is hysteresis input type with a built-in noise filter. 12, 11 48, 34 p35/int11, p36/int12 d general-purpose i/o port also serve as external interrupt input pins. external interrupt input is hysteresis input type with a built-in noise filter.
8 mb89990 series (continued) *1: fpt-28p-m17 *2: dip-28p-m03 *3: mqp-48c-p01 pin no. pin name circuit type function sop* 1 , sh-dip* 2 mqfp* 3 10 33 p37//rco e general-purpose i/o port also serves as remote-control output pin. 18 to 21 6 to 9 p40 to p43 f n-ch open-drain i/o ports 23 11 p45 f n-ch open-drain type i/o port 22 10 p44 f n-ch open-drain type i/o port 28 18 v cc power supply pin 942v ss power supply (gnd) pin
9 mb89990 series external eprom pins (mb89pv190 only) pin no. pin name i/o function 49 v pp o h level output pin 79 78 50 75 71 76 77 51 52 53 54 55 58 59 60 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins 61 62 63 65 66 67 68 69 o1 o2 o3 o4 o5 o6 o7 o8 i data input pins 70 ce o rom chip enable pin outputs h during standby. 73 oe o rom output enable pin outputs l at all times. 80 v cc o eprom power pin 64 v ss o power supply (gnd) pin
10 mb89990 series n i/o circuit type (continued) type circuit remarks a ? at an oscillation feedback registor of approximately 1 m w at 5.0 v ? when crystal and ceramic oscillators are selected optionally ? when cr oscillation is selected optionally b c ? output pull-up resistor (p-ch): about 50 k w at 5.0 v ? hysteresis input ? pull-up resistor optional d ? cmos output ? cmos input ? hysteresis input (resource input) ? pull-up resistor optional x1 x0 standb y control si g nal x1 x0 standb y control si g nal r p-ch n-ch r p-ch n-ch p-ch
11 mb89990 series (continued) type circuit remarks e ? cmos output ? cmos input ? pull-up resistor optional f ? n-ch open-drain output ? analog input ? pull-up resistor optional (mb89990 series only) g ? cmos output ? cmos input ? hysteresis input (resource input) ? analog input ? pull-up resistor optional (mb89990 series only) r p-ch n-ch p-ch r n-ch p-ch analog input p-ch r p-ch n-ch p-ch analo g input
12 mb89990 series n handling devices 1. preventing latch - up latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input or output pins other than medium-to high-voltage pins or if higher than the voltage which shows on 1. absolute maximum ratings in n electrical characteristics is applied between v cc to v ss . when latchup occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to pull-up or pull-down resistor. 3. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 4. power supply voltage fluctuations although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. stabilizing voltage supplied to the ic is therefore important. as stabilization guidelines, it is recommended to control power so that v cc ripple fluctuations (p-p value) will be less than 10% of the standard v cc value at the commercial frequency (50 to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms at the time of a momentary fluctuation such as when power is switched. 5. precautions when using an external clock when an external clock is used, oscillation stabilization time is required even for power-on reset (option selection) and release from stop mode.
13 mb89990 series n programming to prom on the mb89p195 the mb89p195 can program data in the internal prom using a dedicated conversion adaptor and specified general-purpose eprom programmer. 1. memory space 2. specified rom programmer manufacturer, model name, and programming in rom ? recommended rom programmer ? programming procedure (1) load program data into the rom programmer at addresses 4000 h to 7fff h . (addresses 0c000 h to 0ffff h in the operation mode assign to 4000 h to 7fff h in rom programmer. see the illustration above.) (2) set the data at addresses 0000 h to 3fff h of the programmer rom in the rom programmer, to ff h . (3) to set up the successive-address write mode of the rom programmer, press the device, prog, set, select, e and set keys in this order. note: program must be started at the address 0000 h . for details, contact our sales division. manufacturer model advantest r4945 prom 16 kb ffff h 0000 h 8000 h 0080 h 0180 h not available i/o ram c000 h 7fff h 0000 h 4000 h eprom 16 kb free area (read value ff h ) address in normal operation mode eprom mode (corresponding addresses on the eprom programmer)
14 mb89990 series 3. recommended screening conditions high-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked otprom microcontroller program. 4. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature (one time prom). for this reason, a programming yield of 100% cannot be assured at all times. 5. eprom programmer socket adapter and recommended programmer manufacturer inquiry: sun hayato co., ltd. : tel: (81)-3-3986-0403 fax: (81)-3-5396-9106 minato electronics inc. : tel: usa (1)-916-348-6066 japan (81)-45-591-5611 data i/o co., ltd. : tel: usa/asia (1)-206-881-6444 europe (49)-8-985-8580 part no. mb89p195pf package sop-28 compatible socket adapter sun hayato co., ltd. rom-28sop-28dp-8l recommended programmer manufacturer and programmer name minato electronics inc. model 1890a (ver. 2.2) + ou-910 (ver. 4.1) recommended data i/o co., ltd. unisite (ver. 5.0 or later) recommended 3900 (ver. 2.8 or later) 2900 (ver. 3.8 or later) program, verify aging +150 c for 48 hrs. data verification assembly
15 mb89990 series n programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c256a-20tvm 2. programming socket adapter to program to the eprom using an eprom programmer, use the socket adapter (manufacturer: sun hayato co., ltd.) below. inquiry: sun hayato co., ltd.: tel: (81)-3-3986-0403 fax: (81)-3-5396-9106 3. memory space 4. programming to the eprom (1) set the eprom programmer to mbm27c256a. (2) load program data into the eprom programmer at 0006 h to 7fff h . (3) program to 0000 h to 7fff h with the eprom programmer. package adapter socket part number lcc-32 (rectangle) rom-32lc-28dp-s prom 32 kb ffff h 0000 h 8000 h 0080 h 0180 h not available i/o ram 7fff h 0000 h eprom 32 kb address in normal operation mode address when writing to eprom (corresponding addresses on the eprom programmer)
16 mb89990 series n block diagram remote-control carrier frequency external interrupt (wake-up function) test, v cc , v ss the other pins x0 x1 rst p34/to/int10 cmos i/o port cmos i/o port main oscillator circuit 8-bit timer/counter 8-bit timer/counter external interrupt clock control reset circuit (wdt) timebase timer ram (128 8 bits) f 2 mc-8l cpu rom (32k 8 bits) p33/ec p30 to p32 p35/int11 p36/int12 p37/rco 8 p40 to p45 p00/int20 to p07/int27 internal data bus port 3 port 0 n-ch open drain i/o port port 4 6
17 mb89990 series n cpu core 1. memory space the microcontrollers of mb89990 series offer 64 kbytes of memory for storing all of i/o, data, and program areas. the i/o area is located at the lowest address. the data area is provide immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end of i/o area, that is, near the highest address. provide the tables of interrupt reset vectors, and vector call instructions toward the highest address within the program area. the memory space of the mb89990 series is structured below: memory space 0000 h 0080 h 00c0 h 0100 h 0140 h 8000 h not available register mb89997 rom 32 kb i/o ram 128 b 0000 h 0080 h 0100 h 0200 h 0280 h 8000 h not available register mb89pv190 rom 32 kb i/o ram 256 b 0000 h 0080 h 0100 h 0200 h 0280 h c000 h ffff h not available register mb89p195 rom 16 kb i/o ram 256 b reserved
18 mb89990 series 2. registers the f 2 mc-8l family has two types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following dedicated registers are provided: program counter (pc): a 16-bit-long register for indicating the instruction storage positions accumulator (a): a 16-bit-long temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t): a 16-bit-long register which performs arithmetic operations with the accumulator. when the instruction is an 18-bit data processing instruction, the lower byte is used. index register (ix): a 16-bit-long register for index modification extra pointer (ep) : a 16-bit-long pointer for indicating a memory address stack pointer (sp) : a 16-bit-long register for indicating a stack area program status (ps) : a 16-bit-long register for storing a register pointer, a condition code the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr) (see the diagram below). pc a t ix ep sp ps 16 bits : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h indeterminate indeterminate indeterminate indeterminate indeterminate i-flag = 0, il1, 0 = 11 the other bit values are indeterminate. initial value structure of the program status register vacancy h i il1, 0 n z vc 54 rp ps 109876 3210 15 14 13 12 11 rp ccr vacancy vacancy
19 mb89990 series the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of cpu operations at the time of an interrupt. h-flag: set to 1 when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. cleared to 0 otherwise. this flag is for decimal adjustment instructions. i-flag: interrupt is enabled when this flag is set to 1. interrupt is disabled when the flag is cleared to 0. cleared to 0 at the rest. il1, 0: indicates the level of the interrupt currently allowed. processes an interrupt only if its request level is higher than the value indicated by this bit. n-flag: set to 1 if the msb becomes 1 as the result of an arithmetic operation. cleared to 0 when the bit is cleared to 0. z-flag: set to 1 when an arithmetic operation results in 0. cleared otherwise. v-flag: set to 1 if the complement on 2 overflows as a result of an arithmetic operation. cleared to 0 if the overflow does not occur. c-flag: set to 1 when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. cleared to 0 otherwise. set the shift-out value in the case of a shift instruction. il1 il0 interrupt level high-low 00 1 high low 01 10 2 11 3 rule for conversion of actual addresses of the general-purpose register area ? a15 ? a14 ? a13 ? a12 ? a11 ? a10 ? a9 ? a8 r4 a7 r3 a6 r2 a5 r1 a4 r0 a3 b2 a2 b1 a1 b0 a0 lower op codes rp generated addresses
20 mb89990 series the following general-purpose registers are provided: general-purpose registers: an 8-bit-long register for storing data the general-purpose registers are 8 bits and located in register banks of the memory. one bank contains eight registers and up to a total of 16 banks can be used on the mb89957 (ram 128 8 bits). the bank currently in use is indicated by the register bank pointer. (rp) note: the number of register banks that can be used varies with the ram size. register bank configuraiton this address = 0100 h + 8 (rp) memor y area 16 banks (8 banks for the mb89957) r 0 r 1 r 2 r 3 r 4 r 5 r 6 r 7
21 mb89990 series n i/o map note: do not use vacancies. address read/write register name register description 00 h (r/w) pdr0 port 0 data register 01 h (w) ddr0 port 0 data direction register 02 h to 07 h vacancy 08 h (r/w) stbc standby control register 09 h (r/w) wdtc watchdog timer control register 0a h (r/w) tbtc timebase timer control register 0b h vacancy 0c h (r/w) pdr3 port 3 data register 0d h (w) ddr3 port 3 data direction register 0e h (r/w) pdr4 port 4 data register 0f h to 13 h vacancy 14 h (r/w) rcr1 remote-control register 1 15 h (r/w) rcr2 remote-control register 2 16 h vacancy 17 h vacancy 18 h (r/w) t2cr timer 2 control register 19 h (r/w) t1cr timer 1 control register 1a h (r/w) t2dr timer 2 data register 1b h (r/w) t1dr timer 1 data register 1c h to 22 h vacancy 23 h (r/w) eic1 external interrupt control register 1 24 h (r/w) eic2 external interrupt control register 2 25 h to 31 h vacancy 32 h (r/w) eie2 external interrupt 2 enable register 33 h (r/w) eif2 external interrupt 2 flag register 34 h to 7b h vacancy 7c h (w) ilr1 interrupt level register 1 7d h (w) ilr2 interrupt level register 2 7e h (w) ilr3 interrupt level register 3 7f h vacancy
22 mb89990 series n electrical characteristics 1. absolute maximum rating (v ss = 0.0 v) warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol value unit remarks min. max. power supply voltage v cc v ss C 0.3 v ss + 7.0 v eprom program voltage v pp v ss C 0.3 v ss + 13.0 v applicable to test pin of mb89p195. input voltage v i v ss C 0.3 v cc + 0.3 v output voltage v o v ss C 0.3 v cc + 0.3 v l level maximum output current i ol1 ? 10 ma except p33 and p34 i ol2 ? 20 ma p33, p34 l level average output current i olav1 ? 4ma except p33 and p34 average value (operating current operation rate) i olav2 ? 8ma p33 and p34 average value (operating current operation rate) l level total average output current s i olav ? 20 ma average value (operating current operation rate) l level maximum total output current s i ol ? C100 ma h level maximum output current i oh1 ? C10 ma except p33, p34, and p37 i oh2 ? C20 ma p33, p34, p37 h level average output current i ohav1 ? C2 ma except p33, p34, and p37 average value (operating current operation rate) i ohav2 ? C4 ma except p33, p34, and p37 average value (operating current operation rate) h level total average output current s i ohav ? C10 ma average value (operating current operation rate) h level total maximum output current s i oh ? C30 ma power consumption p d ? 200 mw operating temperature t a C40 +85 c storage temperature tstg C55 +150 c
23 mb89990 series 2. recommended operating conditions (v ss = 0.0 v) * : the guaranteed normal operation range varies depending on the operation frequency and the guaranteed analog operation range. see figure 1. figure 1 indicates the operating frequency of the external oscillator at an instruction cycle of 4/f c . warning: recommended operating conditions are normal operating ranges for the semiconductor device. all the devices electrical characteristics are warranted when operated within these ranges. always use semiconductor devices within the recommended operating conditions. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representative beforehand. parameter symbol value unit remarks min. max. power supply voltage v cc 2.2* 6.0* v normal operation assurance range* mb89997 2.7* 6.0* v normal operation assurance range* mb89p195 1.5 6.0 v retains the ram state in stop mode operating temperature t a C40 +85 c figure 1 operating voltage vs. main clock operating frequency 1 2 3 4 5 6 operation assurance range main clock operation frequency (at an instruction cycle of 4/fc) (mhz) 234 4.0 2.0 0.95 minimum execution time (instruction cycle) ( s) ( s) 1 operating voltage (v) note: the shaded area is assured only for the mb89997.
24 mb89990 series 3. dc characteristics (v cc = +5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) (continued) parameter symbol pin name condition value unit remarks min. typ. max. h level input voltage v ih p00 to p07, p30 to p37, test 0.7 v cc v cc + 0.3 v v ihs rst , int10 to int12, ec, int20 to int27 0.8 v cc v cc + 0.3 v l level input voltage v il p00 to p03, p33 to p36, test v ss - 0.3 0.3 v cc v v ils rst , int10 to int12, ec, int 20 to int27 v ss - 0.3 0.2 v cc v open-drain output pin application voltage v d p40 to p44 v ss - 0.3 v ss + 0.3 v h level output voltage v oh1 p00 to p07, p30 to p32, p35, p36 i oh = C2.0 ma 4.0 v v oh2 p33, p34 i oh = C4.0 ma 4.0 v v oh3 p37 i oh = C4.0 ma 4.0 v l level output voltage v ol1 p00 to p07, p30 to p32, p35 to p37 i ol = 4.0 ma 0.4 v v ol2 rst i ol = 4.0 ma 0.4 v v ol3 p33, p34 i ol = 12 ma 0.4 v v ol4 p40 to p45 i ol = 8 ma 0.4 v input leakage current (hi-z output leakage current) i li1 p00 to p07, p30 to p37, test 0.45 v < v i < v cc 5 m a without pull-up resistor open-drain output leakage current (off state) i ld1 p40 to p45 0.45 v < v i < v cc 5 m a without pull-up resistor pull-up resistance r pull p00 to p07, p30 to p37, p40 to p45, rst v i = 0.0 v 25 50 100 k w
25 mb89990 series (continued) (v cc = 5.0 v, v ss = 0.0 v, t a = C40 c to +85 c) * : for the mb89pv190, the current consumption of a connected eprom and ice is not included. the mesurement condition of the power supply current are set as v cc = 5.0 v with an external clock. 4. ac characteristics (1) reset timing (v cc = +5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) note: t xcyl is the oscillation period (1/f c ) input to the x0 pin. parameter symbol pin name condition value unit remarks min. typ. max. power supply voltage* i cc v cc f c = 4.2 mhz 5 10 ma mb89997 7 12 ma mb89p195 i ccs f c = 4.2 mhz 3 7 ma sleep mode i cch t a = +25 c1 m a stop mode input capacitance c in except avr, av ss , v cc , and v ss f = 1 mhz 10 pf parameter symbol condition value unit remarks min. max. rst l pulse width t zlzh 16 t hcyl ns 0.2 v cc 0.2 v cc rst t zlzh
26 mb89990 series (2) power-on reset (v ss = 0.0 v, t a = C40 c to +85 c) note: make sure that power supply rises within the selected oscillation stabilization time. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min. max. power supply rising time t r 50ms power supply cut-off time t off 1 ms due to repeated operations 0.2 v 0.2 v 2.0 v 0.2 v t r v cc t off
27 mb89990 series (3) clock timing (v ss = 0.0 v, t a = C40 c to +85 c) (4) instruction cycle (v ss = 0.0 v, t a = C40 c to +85 c) parameter symbol pin name condition value unit remarks min. max. clock frequency f c x0, x1 1 4.2 mhz clock cycle time t xcyl x0, x1 238 1000 ns input clock pulse width p wh p wl x0 20 ns external clock input clock pulse risilng/falling time t cr t cf x0 10 ns external clock parameter symbol value (typical) unit remarks instruction cycle (minimum execution time) t inst 4/f c m s t inst = 0.95 m s when operating at f c = 4.2 mhz 0.2 v cc 0.8 v cc x0 0.2 v cc t cr t cf 0.8 v cc 0.2 v cc x0 x1 when a crystal or ceramic resonator is used x0 x1 when an external clock is used open p wh t xcyl p wl clock configurations timings conditions
28 mb89990 series (5) peripheral input timing (v cc = 5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) * : for information on t inst, see (4) instruction cycles. (v cc = 5.0 v 10%, v ss = 0.0 v, t a = C40 c to +85 c) parameter symbol pin name value unit remarks min. max. peripheral input h pulse width 1 t ilih1 ec, int10 to int12, int20 to int27 2 t inst * m s peripheral input l pulse width 1 t ihil1 2 t inst * m s parameter symbol pin name value unit remarks min. typ. max. peripheral input h noise limit width t ihnc ec, int10 to int12 71523ns peripheral input l noise limit width t ilnc ec, int10 to int12, int20 to int27 71523ns peripheral input timing diagram 0.2 v cc 0.8 v cc t ihil ec int10 to intr int20 to int27 0.2 v cc t ilih 0.8 v cc peripheral input timing diagram ec int10 to int12 0.2 v cc 0.8 v cc t ilnc 0.2 v cc t ihnc 0.8 v cc
29 mb89990 series n example characteristics 05 1234 0.10 0.15 0.20 0.25 0.30 v ol (v) v cc = 2.0 v v cc = 2.5 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i ol (ma) 0.00 t a = +25 c v ol 1 vs. i ol 0.05 v cc = 3.0 v 010 123456789 0.1 0.2 0.3 0.4 0.5 v ol (v) v cc = 2.5 v v cc = 3.0 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i ol (ma) 0.0 t a = +25 c v ol 2 vs. i ol 0.6 v cc = 2.0 v 020 4 8 12 16 0.2 0.4 0.6 0.8 1.0 v ol (v) v cc = 2.5 v v cc = 3.0 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i ol (ma) 0.0 v ol 3 vs. i ol 1.2 v cc = 2.0 v 2 6 10 14 18 t a = +25 c (1) l level output voltage
30 mb89990 series 012 3 456 7 v cc (v) 5.0 v in (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 v ihs v ils t a = +25 c v in vs. v cc threshold when input voltage in hysteresis characteristics is set to ??level threshold when input voltage in hysteresis characteristics is set to ??level v ihs : v ils : 0 0.5 v cc - v oh (v) v cc = 2.5 v v cc = 3.0 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i oh (ma) 0.4 0.3 0.2 0.1 0.0 ?1 2 3 4 5 t a = +25 c v oh 1 vs. i oh 0.6 v cc = 2.0 v 0 2.5 v cc - v oh (v) v cc = 3.0 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i oh (ma) 2.0 1.5 1.0 0.5 0.0 ?4 8 12 ?16 ?20 t a = +25 c v oh 2 vs. i oh 3.0 v cc = 2.0 v v cc = 2.5 v 0 1.0 v cc - v oh (v) v cc = 2.5 v v cc = 3.0 v v cc = 4.0 v v cc = 5.0 v v cc = 6.0 v i oh (ma) 0.8 0.6 0.4 0.2 0.0 ?2 4 6 8 10 t a = + 25 c v oh 3 vs. i oh 1.2 v cc = 2.0 v (2) h level output voltage (3) h level input voltage/l level input voltage (cmos input) (4) h level input voltage/l level input voltage (hysteresis input) 012 3 456 7 v cc (v) 5.0 v in (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 v in vs. v cc t a = +25 c
31 mb89990 series i cc (ma) v cc (v) 0 1 2345 1 2 3 5 t a = +25 c i cc vs. v cc 67 4 6 fc = 4.2 mhz fc = 3.0 mhz fc = 1.0 mhz i cch ( a) v cc (v) 0 12 34 5 0.4 0.8 1.2 1.6 2.0 t a = +25 c i cch vs. v cc 67 0.2 0.6 1.0 1.4 1.8 i ccs (ma) v cc (v) 0.00 1 2345 0.25 0.50 0.75 1.25 t a = +25 c i ccs vs. v cc 67 1.00 1.50 fc = 4.2 mhz fc = 3.0 mhz fc = 1.0 mhz i r ( a) avr (v) 0 25 50 75 100 125 150 i r vs. avr 12 34 5 67 t a = +25 c (5) power supply current (external clock) (3) pull-up resistance 234 5 6 r pull (k w ) 10 1 100 1000 v cc ( v ) t a = +25 c r pull vs. v cc
32 mb89990 series n instructions execution instructions can be divided into the following four groups: ? transfer ? arithmetic operation ? branch ?others table 1 lists symbols used for notation for instructions. table 1 instruction symbols (continued) symbol meaning dir direct address (8 bits) off offset (8 bits) ext extended address (16 bits) #vct vector table number (3 bits) #d8 immediate data (8 bits) #d16 immediate data (16 bits) dir: b bit direct address (8:3 bits) rel branch relative address (8 bits) @ register indirect (example: @a, @ix, @ep) a accumulator a (whether its length is 8 or 16 bits is determined by the instruction in use.) ah upper 8 bits of accumulator a (8 bits) al lower 8 bits of accumulator a (8 bits) t temporary accumulator t (whether its length is 8 or 16 bits is determined by the instruction in use.) th upper 8 bits of temporary accumulator t (8 bits) tl lower 8 bits of temporary accumulator t (8 bits) ix index register ix (16 bits)
33 mb89990 series (continued) columns indicate the following: mnemonic: assembler notation of an instruction ~: the number of instructions #: the number of bytes operation: operation of an instruction tl, th, ah: a content change when each of the tl, th, and ah instructions is executed. symbols in the column indicate the following: ? - indicates no change. ? dh is the 8 upper bits of operation description data. ? al and ah must become the contents of al and ah prior to the instruction executed. ? 00 becomes 00. n, z, v, c: an instruction of which the corresponding flag will change. if + is written in this column, the relevant instruction will change its corresponding flag. op code: code of an instruction. if an instruction is more than one code, it is written according to the following rule: example: 48 to 4f ? this indicates 48, 49, ... 4f. symbol meaning ep extra pointer ep (16 bits) pc program counter pc (16 bits) sp stack pointer sp (16 bits) ps program status ps (16 bits) dr accumulator a or index register ix (16 bits) ccr condition code register ccr (8 bits) rp register bank pointer rp (5 bits) ri general-purpose register ri (8 bits, i = 0 to 7) indicates that the very is the immediate data. (whether its length is 8 or 16 bits is determined by the instruction in use.) ( ) indicates that the contents of is the target of accessing. (whether its length is 8 or 16 bits is determined by the instruction in use.) (( )) the address indicated by the contents of is the target of accessing. (whether its length is 8 or 16 bits is determined by the instruction in use.)
34 mb89990 series table 2 transfer instructions (48 instructions) notes: during byte transfer to a, t ? a is restricted to low bytes. operands in more than one operand instruction must be stored in the order in which their mnemonics are written. (reverse arrangement of f 2 mc-8 family) mnemonic ~ # operation tl th ah n z v c op code mov dir,a mov @ix +off,a mov ext,a mov @ep,a mov ri,a mov a,#d8 mov a,dir mov a,@ix +off mov a,ext mov a,@a mov a,@ep mov a,ri mov dir,#d8 mov @ix +off,#d8 mov @ep,#d8 mov ri,#d8 movw dir,a movw @ix +off,a movw ext,a movw @ep,a movw ep,a movw a,#d16 movw a,dir movw a,@ix +off movw a,ext movw a,@a movw a,@ep movw a,ep movw ep,#d16 movw ix,a movw a,ix movw sp,a movw a,sp mov @a,t movw @a,t movw ix,#d16 movw a,ps movw ps,a movw sp,#d16 swap setb dir: b clrb dir: b xch a,t xchw a,t xchw a,ep xchw a,ix xchw a,sp movw a,pc 3 4 4 3 3 2 3 4 4 3 3 3 4 5 4 4 4 5 5 4 2 3 4 5 5 4 4 2 3 2 2 2 2 3 4 3 2 2 3 2 4 4 2 3 3 3 3 2 2 2 3 1 1 2 2 2 3 1 1 1 3 3 2 2 2 2 3 1 1 3 2 2 3 1 1 1 3 1 1 1 1 1 1 3 1 1 3 1 2 2 1 1 1 1 1 1 (dir) ? (a) ( (ix) +off ) ? (a) (ext) ? (a) ( (ep) ) ? (a) (ri) ? (a) (a) ? d8 (a) ? (dir) (a) ? ( (ix) +off) (a) ? (ext) (a) ? ( (a) ) (a) ? ( (ep) ) (a) ? (ri) (dir) ? d8 ( (ix) +off ) ? d8 ( (ep) ) ? d8 (ri) ? d8 (dir) ? (ah),(dir + 1) ? (al) ( (ix) +off) ? (ah), ( (ix) +off + 1) ? (al) (ext) ? (ah), (ext + 1) ? (al) ((ep)) ? (ah),( (ep) + 1) ? (al) (ep) ? (a) (a) ? d16 (ah) ? (dir), (al) ? (dir + 1) (ah) ? ((ix) +off), (al) ? ( (ix) +off + 1) (ah) ? (ext), (al) ? (ext + 1) (ah) ? ( (a) ), (al) ? ( (a) ) + 1) (ah) ? ( (ep) ), (al) ? ( (ep) + 1) (a) ? (ep) (ep) ? d16 (ix) ? (a) (a) ? (ix) (sp) ? (a) (a) ? (sp) ( (a) ) ? (t) ( (a) ) ? (th),( (a) + 1) ? (tl) (ix) ? d16 (a) ? (ps) (ps) ? (a) (sp) ? d16 (ah) ? (al) (dir): b ? 1 (dir): b ? 0 (al) ? (tl) (a) ? (t) (a) ? (ep) (a) ? (ix) (a) ? (sp) (a) ? (pc) C C C C C al al al al al al al C C C C C C C C C al al al al al al C C C C C C C C C C C C C C C al al C C C C C C C C C C C C C C C C C C C C C C C C C ah ah ah ah ah ah C C C C C C C C C C C C C C C C ah C C C C C C C C C C C C C C C C C C C C C C C C C dh dh dh dh dh dh dh C C dh C dh C C C dh C C al C C C dh dh dh dh dh C C C C C C C C C C C C C C C C C C C C + + C C + + C C + + C C + + C C + + C C + + C C + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + C C + + C C + + C C + + C C + + C C + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + + + C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 45 46 61 47 48 to 4f 04 05 06 60 92 07 08 to 0f 85 86 87 88 to 8f d5 d6 d4 d7 e3 e4 c5 c6 c4 93 c7 f3 e7 e2 f2 e1 f1 82 83 e6 70 71 e5 10 a8 to af a0 to a7 42 43 f7 f6 f5 f0
35 mb89990 series table 3 arithmetic operation instructions (62 instructions) (continued) mnemonic ~ # operation tl th ah n z v c op code addc a,ri addc a,#d8 addc a,dir addc a,@ix +off addc a,@ep addcw a addc a subc a,ri subc a,#d8 subc a,dir subc a,@ix +off subc a,@ep subcw a subc a inc ri incw ep incw ix incw a dec ri decw ep decw ix decw a mulu a divu a andw a orw a xorw a cmp a cmpw a rorc a rolc a cmp a,#d8 cmp a,dir cmp a,@ep cmp a,@ix +off cmp a,ri daa das xor a xor a,#d8 xor a,dir xor a,@ep xor a,@ix +off xor a,ri and a and a,#d8 and a,dir 3 2 3 4 3 3 2 3 2 3 4 3 3 2 4 3 3 3 4 3 3 3 19 21 3 3 3 2 3 2 2 2 3 3 4 3 2 2 2 2 3 3 4 3 2 2 3 1 2 2 2 1 1 1 1 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 1 1 1 1 2 2 1 2 1 1 2 2 (a) ? (a) + (ri) + c (a) ? (a) + d8 + c (a) ? (a) + (dir) + c (a) ? (a) + ( (ix) +off) + c (a) ? (a) + ( (ep) ) + c (a) ? (a) + (t) + c (al) ? (al) + (tl) + c (a) ? (a) - (ri) - c (a) ? (a) - d8 - c (a) ? (a) - (dir) - c (a) ? (a) - ( (ix) +off) - c (a) ? (a) - ( (ep) ) - c (a) ? (t) - (a) - c (al) ? (tl) - (al) - c (ri) ? (ri) + 1 (ep) ? (ep) + 1 (ix) ? (ix) + 1 (a) ? (a) + 1 (ri) ? (ri) - 1 (ep) ? (ep) - 1 (ix) ? (ix) - 1 (a) ? (a) - 1 (a) ? (al) (tl) (a) ? (t) / (al),mod ? (t) (a) ? (a) (t) (a) ? (a) (t) (a) ? (a) " (t) (tl) - (al) (t) - (a) (a) - d8 (a) - (dir) (a) - ( (ep) ) (a) - ( (ix) +off) (a) - (ri) decimal adjust for addition decimal adjust for subtraction (a) ? (al) " (tl) (a) ? (al) " d8 (a) ? (al) " (dir) (a) ? (al) " ( (ep) ) (a) ? (al) " ( (ix) +off) (a) ? (al) " (ri) (a) ? (al) (tl) (a) ? (al) d8 (a) ? (al) (dir) C C C C C C C C C C C C C C C C C C C C C C C dl C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C 00 C C C C C C C C C C C C C C C C C C C C C C C C C C C C dh C C C C C C dh C C C C dh C C C dh dh 00 dh dh dh C C C C C C C C C C C C C C C C C C C C + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + C C C C C C C C C + + C C + + + C C C C C C C C C + + C C C C C C C C C C + + r C + + r C + + r C + + + + + + + + + + C + + + C + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C 28 to 2f 24 25 26 27 23 22 38 to 3f 34 35 36 37 33 32 c8 to cf c3 c2 c0 d8 todf d3 d2 d0 01 11 63 73 53 12 13 03 02 14 15 17 16 18 to 1f 84 94 52 54 55 57 56 58 to 5f 62 64 65 ? ? c c ? a ? a
36 mb89990 series (continued) table 4 branch instructions (17 instructions) table 5 other instructions (9 instructions) mnemonic ~ # operation tl th ah n z v c op code and a,@ep and a,@ix +off and a,ri or a or a,#d8 or a,dir or a,@ep or a,@ix +off or a,ri cmp dir,#d8 cmp @ep,#d8 cmp @ix +off,#d8 cmp ri,#d8 incw sp decw sp 3 4 3 2 2 3 3 4 3 5 4 5 4 3 3 1 2 1 1 2 2 1 2 1 3 2 3 2 1 1 (a) ? (al) ( (ep) ) (a) ? (al) ( (ix) +off) (a) ? (al) (ri) (a) ? (al) (tl) (a) ? (al) d8 (a) ? (al) (dir) (a) ? (al) ( (ep) ) (a) ? (al) ( (ix) +off) (a) ? (al) (ri) (dir) C d8 ( (ep) ) C d8 ( (ix) +off) C d8 (ri) C d8 (sp) ? (sp) + 1 (sp) ? (sp) C 1 C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + r C + + + + + + + + + + + + + + + + C C C C C C C C 67 66 68 to 6f 72 74 75 77 76 78 to 7f 95 97 96 98 to 9f c1 d1 mnemonic ~ # operation tl th ah n z v c op code bz/beq rel bnz/bne rel bc/blo rel bnc/bhs rel bn rel bp rel blt rel bge rel bbc dir: b,rel bbs dir: b,rel jmp @a jmp ext callv #vct call ext xchw a,pc ret reti 3 3 3 3 3 3 3 3 5 5 2 3 6 6 3 4 6 2 2 2 2 2 2 2 2 3 3 1 3 1 3 1 1 1 if z = 1 then pc ? pc + rel if z = 0 then pc ? pc + rel if c = 1 then pc ? pc + rel if c = 0 then pc ? pc + rel if n = 1 then pc ? pc + rel if n = 0 then pc ? pc + rel if v " n= 1 then pc ? pc + rel if v " n= 0 then pc ? pc + rei if (dir: b)= 0 then pc ? pc + rel if (dir: b)= 1 then pc ? pc + rel (pc) ? (a) (pc) ? ext vector call subroutine call (pc) ? (a),(a) ? (pc) + 1 return from subrountine return form interrupt C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C dh C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C + C C C + C C C C C C C C C C C C C C C C C C C C C C C C C C restore fd fc f9 f8 fb fa ff fe b0 to b7 b8 to bf e0 21 e8 to ef 31 f4 20 30 mnemonic ~ # operation tl th ah n z v c op code pushw a popw a pushw ix popw ix nop clrc setc clri seti 4 4 4 4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C C C C C C C C C C C C C C C C C C C dh C C C C C C C C C C C C C C C C C C C C C C C C C C C C C C r C C C s C C C C C C C C 40 50 41 51 00 81 91 80 90
37 mb89990 series n instruction map 0123456789 abcdef 0 nop swap ret reti pushw a popw a mov a,ext movw a,ps clri seti clrb dir: 0 bbc dir: 0,rel incw a decw a jmp @a movw a,pc 1 mulu a divu a jmp addr16 call addr16 pushw ix popw ix mov ext,a movw ps,a clrc setc clrb dir: 1 bbc dir: 1,rel incw sp decw sp movw sp,a movw a,sp 2 rolc a cmp a addc a subc a xch a, t xor a and a or a mov @a,t mov a,@a clrb dir: 2 bbc dir: 2,rel incw ix decw ix movw ix,a movw a,ix 3 rorc a cmpw a addcw a subcw a xchw a, t xorw a andw a orw a movw @a,t movw a,@a clrb dir: 3 bbc dir: 3,rel incw ep decw ep movw ep,a movw a,ep 4 mov a,#d8 cmp a,#d8 addc a,#d8 subc a,#d8 xor a,#d8 and a,#d8 or a,#d8 daa das clrb dir: 4 bbc dir: 4,rel movw a,ext movw ext,a movw a,#d16 xchw a,pc 5 mov a,dir cmp a,dir addc a,dir subc a,dir mov dir,a xor a,dir and a,dir or a,dir mov dir,#d8 cmp dir,#d8 clrb dir: 5 bbc dir: 5,rel movw a,dir movw dir,a movw sp,#d16 xchw a,sp 6 mov a,@ix +d cmp a,@ix +d addc a,@ix +d subc a,@ix +d mov @ix +d,a xor a@,ix +d and a,@ix +d or a,@ix +d mov @ix +d,#d8 cmp @ix +d,#d8 clrb dir: 6 bbc dir: 6,rel movw a,@ix +d movw @ix +d,a movw ix,#d16 xchw a,ix 7 mov a,@ep cmp a,@ep addc a,@ep subc a,@ep mov @ep,a xor a,@ep and a,@ep or a,@ep mov @ep ,#d8 cmp @ep ,#d8 clrb dir: 7 bbc dir: 7,rel movw a,@ep movw @ep,a movw ep,#d16 xchw a,ep 8 mov a,r0 cmp a,r0 addc a,r0 subc a,r0 mov r0,a xor a,r0 and a,r0 or a,r0 mov r0,#d8 cmp r0,#d8 setb dir: 0 bbs dir: 0,rel inc r0 dec r0 callv #0 bnc rel 9 mov a,r1 cmp a,r1 addc a,r1 subc a,r1 mov r1,a xor a,r1 and a,r1 or a,r1 mov r1,#d8 cmp r1,#d8 setb dir: 1 bbs dir: 1,rel inc r1 dec r1 callv #1 bc rel a mov a,r2 cmp a,r2 addc a,r2 subc a,r2 mov r2,a xor a,r2 and a,r2 or a,r2 mov r2,#d8 cmp r2,#d8 setb dir: 2 bbs dir: 2,rel inc r2 dec r2 callv #2 bp rel b mov a,r3 cmp a,r3 addc a,r3 subc a,r3 mov r3,a xor a,r3 and a,r3 or a,r3 mov r3,#d8 cmp r3,#d8 setb dir: 3 bbs dir: 3,rel inc r3 dec r3 callv #3 bn rel c mov a,r4 cmp a,r4 addc a,r4 subc a,r4 mov r4,a xor a,r4 and a,r4 or a,r4 mov r4,#d8 cmp r4,#d8 setb dir: 4 bbs dir: 4,rel inc r4 dec r4 callv #4 bnz rel d mov a,r5 cmp a,r5 addc a,r5 subc a,r5 mov r5,a xor a,r5 and a,r5 or a,r5 mov r5,#d8 cmp r5,#d8 setb dir: 5 bbs dir: 5,rel inc r5 dec r5 callv #5 bz rel e mov a,r6 cmp a,r6 addc a,r6 subc a,r6 mov r6,a xor a,r6 and a,r6 or a,r6 mov r6,#d8 cmp r6,#d8 setb dir: 6 bbs dir: 6,rel inc r6 dec r6 callv #6 bge rel f mov a,r7 cmp a,r7 addc a,r7 subc a,r7 mov r7,a xor a,r7 and a,r7 or a,r7 mov r7,#d8 cmp r7,#d8 setb dir: 7 bbs dir: 7,rel inc r7 dec r7 callv #7 blt rel l h
38 mb89990 series n mask option list *1: the oscillation stabilization delay time is generated by dividing the original clock oscillation. the time described in this item should be used as a guideline since the oscillation cycle is unstable immediately after oscillation starts. f c indicates the original oscillation frequency. *2: C101 is provided respectively for the mb89p195 otp versions as the standard product. no. part number mb89997 mb89p195 mb89pv190 specifying procedure specify when ordering masking C101 *2 specify when ordering masking C201 *2 fixed 1 por t pull-up resistors p00 to p07 p30 to p37 p40 to p45 selectable by pin none selectable by pin none not available 2 power-on reset selection power-on reset provided no power-on reset selectable enabled enabled enabled enabled 3 selection of oscillation stabilization wait time (at 4.2 mhz) *1 2 18 /f c (approx. 62.4 ms) 2 16 /f c (approx. 15.6 ms) 2 12 /f c (approx. 0.98 ms) 2 2 /f c (approx. 0 ms) selectable fixed to 2 16 /f c selectable fixed to 2 16 /f c fixed to 2 16 /f c 4 reset pin output reset output provided no reset output selectable enabled selectable enabled output enabled 5 oscillation type of clock 1 crystal and ceramic oscillators 2 cr selectable 1 only selectable 1 only 1 only
39 mb89990 series n ordering information part number package remarks mb89997pf mb89p195pf-101 28-pin plastic sop (fpt-28p-m17) MB89997P-SH 28-pin plastic sh-dip (dip-28c-m03) mb89pv190cf 48-pin ceramic mqfp (mqp-48c-p01)
40 mb89990 series n package dimensions C0 +.020 C.012 +.008 C0 +0.50 +0.20 C0.30 typ 10.16(.400) 0.250.05 (.010.002) 23.114(.910)ref (.018.004) 0.450.10 (.070.007) 3.00(.118)min 4.85(.191)max (.358.010) 9.100.25 .039 1.024 index-1 max 1.778(.070) 1.00 0.51(.020)min 15max 26.00 1.7780.18 index-2 1994 fujitsu limited d28012s-3c-3 c +0.25 C0.20 +.010 C.008 0.13(.005) m (.465.012) 11.800.30 (.339.008) 8.600.20 details of "a" part details of "b" part 0.20(.008) 0.15(.006) max 0.68(.027) max 0.18(.007) 0.18(.007) max 0.68(.027) max 0.35(.014) 0.20(.008) 2.80(.110)max (stand off) 0(0)min (.402.012) 10.200.30 (.031.008) 0.800.20 (.006.002) 0.150.05 "b" 0.10(.004) ref 16.51(.650) index "a" (.018.004) 0.450.10 typ 1.27(.050) 14 1 15 28 17.75 .699 1994 fujitsu limited f28048s-1c-1 c (mounting height) dimensions in mm (inches) 28-pin plastic sop (fpt-28p-m17) dimensions in mm (inches) 28-pin plastic sh-dip (dip-28p-m03)
41 mb89990 series C.010 +.018 C0.25 +0.45 +0.13 C0.0 +.005 C0 pin no.1 index 1.50(.059)typ 1.00(.040)typ 8.80(.346)ref (.0315.0087) 0.800.22 (.016.003) 0.400.08 .043 1.10 0.60(.024)typ 8.50(.335)max (.006.002) 0.150.05 pad no.1 index 4.50(.177)typ 0.30(.012)typ typ typ 8.71(.343) 7.14(.281) (.040.005) 1.020.13 10.92 .430 pin no.1 index 17.20(.677)typ (.591.010) 15.000.25 (.583.014) 14.820.35 1994 fujitsu limited m48001sc-4-2 c dimensions in mm (inches) 48-pin ceramic mqfp (mqp-48c-p01)
44 mb89990 series fujitsu limited for further information please contact: japan fujitsu limited corporate global business support division electronic devices kawasaki plant, 4-1-1, kamikodanaka nakahara-ku, kawasaki-shi kanagawa 211-88, japan tel: (044) 754-3763 fax: (044) 754-3329 http://www.fujitsu.co.jp/ north and south america fujitsu microelectronics, inc. semiconductor division 3545 north first street san jose, ca 95134-1804, u.s.a. tel: (408) 922-9000 fax: (408) 922-9179 customer response center mon. - fri.: 7 am - 5 pm (pst) tel: (800) 866-8608 fax: (408) 922-9179 http://www.fujitsumicro.com/ europe fujitsu mikroelektronik gmbh am siebenstein 6-10 d-63303 dreieich-buchschlag germany tel: (06103) 690-0 fax: (06103) 690-122 http://www.fujitsu-ede.com/ asia pacific fujitsu microelectronics asia pte ltd #05-08, 151 lorong chuan new tech park singapore 556741 tel: (65) 281-0770 fax: (65) 281-0220 http://www.fmap.com.sg/ f9710 ? fujitsu limited printed in japan all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. also, fujitsu is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. fujitsu semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). caution: customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with fujitsu sales representatives before such use. the company will not be responsible for damages arising from such use without prior approval. any semiconductor devices have inherently a certain rate of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade control law of japan, the prior authorization by japanese government should be required for export of those products from japan.

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